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Alternative Software Loader

Structure

After one CBM boot file, there are 2 turbo blocks. CBM Data CRC is 0x823DBD1F. The turbo loader code is entirely inside the CBM Header block.

Turbo blocks

  • Threshold: 0x02D0 (720) clock cycles (TAP value: 0x5A)
  • Bit 0 pulse: 0x3D
  • Bit 1 pulse: 0x7E
  • Endianess: LSbF
  • Pilot bit: 0×52 pulse (size: 0xA00 pulses)
  • Sync bit: a single Bit 1 pulse
  • Additional sync train (bytes): 0×00, 0×00, 0x1A, 0xBB

Header

  • 01 byte : Ignored by loader
  • 02 bytes: Load address (LSBF)
  • 02 bytes: End address (LSBF)

Data

Trailer

  • None

Tapes using this loader

Commented Loader Code

; From Cricket Crazy - Documented by Luigi Di Fraia

; CBM Header
*=$033C

; Cassette I/O Buffer - Header
T033C   .byte $03,$00,$03,$0C,$03,$43,$52,$49,$43,$4B,$45,$54,$20,$43,$52,$41
T034C   .byte $5A,$59,$20,$20,$20

        SEI           

        LDA #$0B      
        STA $D011     

        LDX #$7F      ; Disable all CIA interrupts
        STX $DC0D     
        STX $DD0D     
        INX           
        STX $DC0D     
        STX $DD0D     

        LDA #$02      ; Threshold is 0x02D0 clock cycles
        STA $DD07     
        STA $8B       ; 2 files to load
        LDA #$D0      
        STA $DD06     

        LDA #$19      
        STA $DD0F     

        LDA #$17      
        STA $01       

; Load file
B037B   LDY #$00      
        STY $8C       ; Set in-sync flag
        STY $8D       ; Reset incoming byte storage

        LDA #$02      ; Red (seeking file)
        STA $D020     

        JSR S03CC     ; Synchronize (0x1A)
        LDA $8C       
        BEQ *-5       

        JSR S03CC     ; Check for additional sync byte (0xBB)
        CMP #$BB      
        BNE B037B     

        LDA #$05      ; Green (loading file)
        STA $D020     

        JSR S03CC     ; Ignore File ID

        JSR S03CC     ; Load address (LSB)
        STA $FB       

        JSR S03CC     ; Load address (MSB)
        STA $FC       

        JSR S03CC     ; End address+1 (LSB)
        STA $FD       

        JSR S03CC     ; End address+1 (MSB)
        STA $FE       

B03B0   JSR S03CC     
        STA ($FB),Y   
        INC $FB       
        BNE *+4       
        INC $FC       

        LDA $FB       
        CMP $FD       
        LDA $FC       
        SBC $FE       
        BCC B03B0     

        DEC $8B       ; Check if there are blocks left
        BNE B037B     

        JMP $6409     ; Start game

; Read byte
S03CC   LDA #$08      ; Init bit counter to read 8 bits
        STA $8E       

B03D0   JSR S03E9     ; Wait for a bit
        ROR $8D       ; Put bits in storage location, LSbF

        LDA $8C       ; Check in-sync flag
        BNE B03E2     

        LDA $8D       ; Check for sync value
        CMP #$1A      
        BNE B03E2     
        STA $8C       ; Change flag
        RTS           

B03E2   DEC $8E       ; Next bit
        BNE B03D0     ; Unless we have got 8
        LDA $8D       ; Copy read byte to Accumulator
        RTS           

; Read bit
S03E9   LDX #$19      
        LDA #$10      
        BIT $DC0D     ; Busy loop: wait for edge on FLAG line
        BEQ *-3       
        LDA $DD0D     
        STX $DD0F     ; Start (or re-start) CIA #2 Timer B, one-shot, force load
        LSR           ; Move CIA #2 Timer B underflow flag to Carry
        LSR           
        RTS           


T03FB   .byte $02

See also


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